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74HCT574 Datasheet PDF

Part Series:
74HCT574 Series
Category:
Logic ICs
Description:
IC D-TYPE POS TRG SNGL 20TSSOP
Updated Time: 2023/01/13 02:10:35 (UTC + 8)

74HCT574 Datasheet PDF Logic ICs

21 Pages
NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin TSSOP T/R
20 Pages
NXP
NXP 74HCT574D,653 Flip-Flop, Tri State Non Inverted, Positive Edge, 74HCT574, D, 18ns, 123MHz, 6mA, SOIC
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NXP
NXP 74HCT574D,652 Flip-Flop, Tri State Non Inverted, Positive Edge, 74HCT574, D, 18ns, 69MHz, 7.8mA, SOIC
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NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin PDIP Bulk
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Nexperia
IC D-TYPE POS TRG SNGL 20TSSOP
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Nexperia
IC D-TYPE POS TRG SNGL 20SSOP
19 Pages
Nexperia
IC D-TYPE POS TRG SNGL 20SOIC
19 Pages
NXP
NXP 74HCT574D Flip-Flop, Tri State Non Inverted, Positive Edge, 74HCT574, D, 18ns, 123MHz, 6mA, SOIC
19 Pages
NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin TSSOP Tube
19 Pages
Philips
74HC/HCT574 Octal D-type flip-flop positive edge-trigger 3-state
19 Pages
Nexperia
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin SO
19 Pages
NXP
NXP 74HCT574N Flip-Flop, 74HCT574, D, 18ns, 123MHz, 6mA, DIP
19 Pages
Nexperia
IC D-TYPE POS TRG SNGL 20TSSOP
19 Pages
NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin SSOP Tube
19 Pages
NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin TSSOP Tube
19 Pages
NXP
Flip Flop D-Type Bus Interface Pos-Edge 3-ST 1Element 20Pin SSOP T/R

74HCT574PW,118 - Nexperia Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
76 MHz
Number of Pins
20 Pin
Capacitance
3.5 pF
Case/Package
TSSOP-20
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74HCT574PW,118 - Nexperia Function Overview

The 74HCT574PW is a 8-bit positive-edge triggered D-type Flip-flop with 3-state outputs. The device features a clock and OE\ inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the low-to-high clock transition. A high on OE\ causes the outputs to assume a high-impedance OFF-state. Operation of the OE\ input does not affect the state of the flip-flops. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Complies with JEDEC standard no. 7A
TTL Input levels
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