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CD4011 Datasheet PDF

Part Series:
CD4011 Series
Category:
Logic Gates
Description:
NAND Gate 4Element 2IN CMOS 14Pin PDIP Tube
Updated Time: 2023/01/13 01:22:08 (UTC + 8)

CD4011 Datasheet PDF Logic Gates

20 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin TSSOP Tube
20 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC T/R
20 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin SOP T/R
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TI
NAND Gate 4Element 2IN CMOS 14Pin PDIP Tube
19 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin CDIP Tube
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TI
NAND Gate 4Element 2IN CMOS 14Pin CDIP Tube
18 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin TSSOP T/R
17 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin PDIP Tube
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NAND Gate 4Element 2IN CMOS 14Pin CDIP Tube
15 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC Tube
15 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin SOIC T/R
15 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin SOP T/R
15 Pages
TI
NAND Gate 4Element 2IN CMOS 14Pin PDIP Tube
13 Pages
TI
Counter/Latch/Decoder/Driver Single 5Bit Decade UP/Down 16Pin PDIP Tube
13 Pages
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Terminator -55℃ to 125℃ 14Pin PDIP Tube
9 Pages
Fairchild
NAND Gate 4Element 2IN CMOS 14Pin SOIC N T/R

CD4011BE - TI Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Number of Pins
14 Pin
Supply Voltage (DC)
3.00V ~ 18.0V
Operating Voltage
3V ~ 18V
Case/Package
PDIP-14
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CD4011BE - TI Function Overview

CD4011BE NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.
Propagation delay time = 60ns typ. at CL = 50pF, VDD = 10 V
Buffered inputs and outputs
Standardized symmetrical output characteristics
Maximum input current of 1µA at 18V over full package temperature range; 100nA at 18V and 25°C
100% tested for quiescent current at 20V
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