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CD4020 Datasheet PDF

Part Series:

CD4020 Series

Category:

Logic ICs

Description:

Binary Ripple Counter, 24MHz, 1 Gate, 1Input, 3V to 18V, DIP-16

Document:

CD4020BNSRE4 Datasheet PDF (31 Pages)

Updated Time: 2023/01/13 01:35:49 (UTC + 8)

CD4020 Logic ICs Datasheet PDF

#1

CD4020BNSRE4

Datasheet PDF (31 Pages)

0.7

TI

#2

CD4020BNSRG4

Datasheet PDF (29 Pages)

0.7

TI

#3

CD4020BE

Datasheet PDF (25 Pages)

5.3

TI

#4

CD4020BPWR

Datasheet PDF (25 Pages)

2.8

TI

CD4020 Datasheet PDF Logic ICs

25 Pages

TI

Counter/Divider Single 14Bit Binary UP 16Pin SOP T/R

25 Pages

TI

TEXAS INSTRUMENTS CD4020BPW Ripple Carry Binary / Divider, 24MHz, 3V to 18V, TSSOP-16

25 Pages

TI

Counter/Divider Single 14Bit Binary UP 16Pin TSSOP Tube

25 Pages

TI

TEXAS INSTRUMENTS CD4020BEE4 Ripple Carry Binary / Divider, 24MHz, 3V to 18V, DIP-16

23 Pages

TI

IC,COUNTER,UP,14Bit BINARY,CMOS,DIP,16Pin,CERAMIC

23 Pages

TI

Counter/Divider Single 14Bit Binary UP 16Pin CDIP Tube

23 Pages

TI

of b series cmos devices" applications: control counters timers frequency dividers time-delay circuits cd4020b - 14 s...

23 Pages

TI

Counter/Divider Single 14Bit Binary UP 16Pin TSSOP Tube

23 Pages

TI

CMOS 14-Stage Ripple-Carry Binary Counter/Divider 16-TSSOP -55 to 125

23 Pages

TI

Counter/Divider Single 14Bit Binary UP 16Pin TSSOP T/R

10 Pages

Fairchild

Counter/Divider Single 14Bit Binary UP 16Pin SOIC N Rail

8 Pages

Fairchild

Counter/Divider Single 14Bit Binary UP 16Pin PDIP

8 Pages

Fairchild

Counter/Divider Single 14Bit Binary UP 16Pin SOIC N T/R

More CD4020 Datasheet PDF >

CD4020BE - TI Specifications

TYPE

DESCRIPTION

Mounting Style

Through Hole

Number of Pins

16 Pin

Supply Voltage (DC)

15.0 V, 18.0 V (max)

Case/Package

DIP-16

Number of Outputs

12 Output

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CD4020BE - TI Function Overview

●The CD4020BE is a CMOS 14-stage ripple-carry Binary Counter/Divider. All counter stages are master-slave flip-flops. The state of a counter advances one count on the negative transition of each input pulse, a high level on the RESET line resets the counter to its all zeros state. Schmitt trigger action on the input-pulse line permits unlimited rise and fall times. All inputs and outputs are buffered.

● Medium-speed operation

● Fully static operation

● Buffered inputs and outputs

● 100% Tested for quiescent current at 20V

● Standardized, symmetrical output characteristics

● Common reset

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