74AHC14PW,118 Datasheet PDF - Nexperia

●The 74AHC14PW is a high-speed Si-gate CMOS device provides six inverting buffers with Schmitt-trigger action. The device is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The device is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

● Balanced propagation delays

● All inputs have Schmitt-trigger actions

● Inputs accept voltages higher than VCC

● ESD PROT - HBM EIA/JESD22-A114E >2000V, MM EIA/JESD22-A115-A >200V, CDM EIA/JESD22-C101C >1000V