74AUP1G17GW Datasheet PDF - NXP

●The 74AUP1G17GW is a single Schmitt trigger Buffer capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 to 3.6V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

● High noise immunity

● IOFF circuitry provides partial power-down mode operation

● Low static power consumption, ICC = 0.9µA maximum

● Latch-up performance exceeds 100mA per JESD 78 class II

● Inputs accept voltages up to 3.6V

● Low noise overshoot and undershoot <10% of VCC