74HC05PW Datasheet PDF - NXP

●General description

●The 74HC05 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A.

●The 74HC05 contains six inverters.The outputs of the 74HC05 are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. The open-drain outputs require pull-up resistors to perform correctly.

●Features

●■ Wide operating voltage 2.0 V to 6.0 V

●■ Input levels:

●   ◆ For 74HC05: CMOS level

●■ Latch-up performance exceeds 100 mA per JESD 78 Class II level A

●■ ESD protection:

●   ◆ HBM JESD22-A114E exceeds 2000 V

●   ◆ CDM JESD22-C101C exceeds 1000 V

●■ Multiple package options

●■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C