74HCT174D,652 Datasheet PDF - NXP

●The 74HCT174D is a hex positive edge-triggered D-type Flip-flop with individual data inputs (Dn) and outputs (Qn). The common clock (CP) and master reset (MR\\) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the low-to-high clock transition is stored in the flip-flop and appears at the Q output. A low on MR\ causes the flip-flops and outputs to be reset low. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

● Six edge-triggered D-type flip-flops

● Asynchronous master reset

● TTL Input levels

● Complies with JEDEC standard No. 7A