74LVC1G126GV Datasheet PDF - NXP

●The 74LVC1G126 provides one non-inverting buffer/line driver with 3-state output. The

●3-state output is controlled by the output enable input (OE). A LOW-level at pin OE

●causes the output to assume a high-impedance OFF-state.

●The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of

●this device in a mixed 3.3 V and 5 V environment.

●This device is fully specified for partial power-down applications using IOFF. The IOFF

●circuitry disables the output, preventing the damaging backflowcurrent through the device

●when it is powered down.