74LVC1G126GW Datasheet PDF - NXP

●The 74LVC1G126GW is a non-inverting Buffer/Line Driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A Low-level at pin OE causes the output to assume a high-impedance OFF-state. The input can be driven from either 3.3/5V devices. This feature allows the use of this device in a mixed 3.3 and 5V environment. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

● High noise immunity

● CMOS low power consumption

● Direct interface with TTL levels

● Complies with JEDEC standard

● Latch-up performance exceeds 250mA

● Inputs accept voltages up to 5V