74LVC245APW,118 Datasheet PDF - NXP

●The 74LVC245APW,118 is a 8-bit Bus Transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The device features an output enable (OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the outputs so that the buses are effectively isolated. Inputs can be driven from either 3.3/5V devices and when disabled, up to 5.5V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 and 5V applications. The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs.

● CMOS low-power consumption

● Direct interface with TTL levels

● Complies with JEDEC standard

● 5V Tolerant inputs/outputs for interfacing with 5V logic

● High-impedance when VCC = 0V

● Inputs accept voltages up to 5.5V