AD9512UCPZ-EP-R7 Datasheet PDF - ADI

●GENERAL DESCRIPTION

●The AD9512-EP provides a multi-output clock distribution in a design that emphasizes low jitter and low phase noise to maximize data converter performance. Other applications with demanding phase noise and jitter requirements can also benefit from this part.

●There are five independent clock outputs. Three outputs are LVPECL (1.2 GHz), and two are selectable as either LVDS (800 MHz) or CMOS (250 MHz) levels.

●FEATURES

●  Two 1.6 GHz, differential clock inputs

●  5 programmable dividers, 1 to 32, all integers

●  3 independent 1.2 GHz LVPECL outputs

●  Additive output jitter 225 fs rms

●  2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs

●  Additive output jitter: 275 fs rms

●  Serial control port

●  Space-saving 48-lead LFCSP

●ENHANCED PRODUCT FEATURES

●  Supports defense and aerospace applications (AQEC standard)

●  Military temperature range (−55°C to +85°C)

●  Controlled manufacturing baseline

●  1 assembly/test site

●  1 fabrication site

●  Enhanced product change notification

●  Qualification data available on request

●APPLICATIONS

●  Low jitter, low phase noise clock distribution

●  Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

●  Defense and aerospace applications