●The ADS62P49EVM is a circuit board that allows designers to evaluate the performance of ADS62P49 device, a dual channel 14bit 250MSPS analog to digital converter. The ADC features a user selectable parallel CMOS or DDR LVDS output. Users can use either the TSW1100 (CMOS mode) or TSW1200EVM (DDR LVDS mode) to capture the data from the converter. The EVM provides a flexible environment to test the ADS62P49 under a variety of clock, input and supply conditions. The EVM also includes an open socket for new 10 output low Jitter clock synchronizer and Jitter cleaner device, the CDCE72010, which can be used to drive the clocking input to the ADS62P49. Open sockets are also provided for an external VCXO and crystal band pass filter allowing for rapid evaluation of a combined high performance ADC and clocking circuit equivalent to a final system level solution.
● USB input for gain settings and other SPI register controls
● Transformer coupled analog input path
● Transformer coupled CLK input path with open socket for CDCE72010 Jitter cleaner and CLK sync
● Active gain input path based on the THS4509 high speed amplifier
● Configurable parallel CMOS or DDR LVDS output modes
● Direct connection to TSW1100 or TSW1200EVM high speed ADC evaluation systems
● Separate analog and digital supply connections or single 5V global supply connection
● 1.25W at 250MSPS total power
● DC offset correction
●It is important to operate this EVM within the input voltage range of -0.3V to 5.6V and the output voltage range of -0.3V to 5.6V. Exceeding the specified input range may cause damage to the EVM.
