●The Sitara - AM1x series ARM Microprocessor enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices featuring robust operating systems support, rich user interfaces and high processing performance life through the maximum flexibility of a fully integrated mixed processor solution. The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16- or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously. The ARM core has a coprocessor 15 (CP15), protection module and data and program memory management units (MMUs) with table look-aside buffers. The ARM core processor has separate 16kB instruction and 16kB data caches. Both are four-way associative with virtual index virtual tag (VIVT). The ARM core also has 8kB of RAM (Vector Table) and 64kB of ROM.
● 375- and 456-MHz ARM926EJ-S™ RISC MPU
● ARM Jazelle® technology single-cycle MAC ARM926EJ-S core
● Enhanced direct memory access controller 3 (EDMA3)
● 128kB On-chip memory
● 1.8 or 3.3V LVCMOS I/Os (except for USB and DDR2 interfaces)
● Two external memory interfaces - EMIFA and DDR2/mobile DDR memory controller
● Three configurable 16550-type UART modules
● LCD controller
● Two serial peripheral interfaces (SPIs) each with multiple chip selects
● Two multimedia card (MMC)/secure digital card (SD) interfaces with secure data I/O (SDIO) interfaces
● Two master and slave inter-integrated circuits (I²C Bus™)
● One host-port interface (HPI) with 16-bit-wide Muxed address and data bus for high bandwidth
● Programmable real-time unit subsystem (PRUSS)
● USB 1.1 OHCI (host) with integrated PHY (USB1)
● USB 2.0 OTG port with integrated PHY (USB0)
● One multichannel audio serial port (McASP)
● Two multichannel buffered serial ports (McBSPs)
● 10/100Mbps Ethernet MAC (EMAC)
● Video port interface (VPIF)
● Universal Parallel Port (uPP) - High-speed parallel interface to FPGAs and data converters
Part 3D Model
