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CD4027BF3AS2534 Datasheet PDF - TI

Manufacturer:

Category:

Flip Flops

Case Package:

CDIP

Description:

CMOS Dual J-K Master-Slave Flip-Flop 16-CDIP

Pictures:

3D Model

Symbol

Footprint

Pinout

Product Pictures

Documentation:

CD4027BF3AS2534 Datasheet (27 Pages)

Package Outline Dimension on5 Page 7 Page 8 Page 15 Page 16 Page

CD4027BF3AS2534 Application Note (15 Pages)

CD4027BF3AS2534 Datasheet PDF (27 Pages)

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CD4027BF3AS2534 Specifications

TYPE

DESCRIPTION

Mounting Style

Through Hole

Case/Package

CDIP

Number of Bits

2 Bit

Voltage Nodes

5.00 V, 10.0 V, 15.0 V

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CD4027BF3AS2534 Size & Package

TYPE

DESCRIPTION

Product Lifecycle Status

Obsolete

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CD4027BF3AS2534 Environmental

CD4027BF3AS2534 Documents

CD4027BF3AS2534 Datasheet

27 Pages / 1.47 MByte

CD4027BF3AS2534 Other Datasheet PDF

2 Pages / 0.06 MByte

CD4027BF3AS2534 Application Note

15 Pages / 0.78 MByte

CD4027BF3 Documents

CD4027BF3A Datasheet PDF

Flip Flop JK-Master-Slave Type Pos-Edge 2Element 16Pin CDIP Tube

CD4027BF3A Datasheet PDF

Intersil

IC,FLIP-FLOP,DUAL,J/K TYPE,CMOS,DIP,16PIN,CERAMIC

CD4027BF3AS2534 Datasheet PDF

CMOS Dual J-K Master-Slave Flip-Flop 16-CDIP

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