CD74HC164M96G4 Datasheet PDF - TI

●Description

●The ’HC164 and ’HCT164 are 8-bit serial-in parallel-out shift registers with asynchronous reset. Data is shifted on the positive edge of Clock (CP). A LOW on the Master Reset (MR) pin resets the shift register and all outputs go to the LOW state regardless of the input conditions. Two Serial Data inputs (DS1 and DS2) are provided, either one can be used as a Data Enable control.

●Features

●• Buffered Inputs

●• Asynchronous Master Reset

●• Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25oC

●• Fanout (Over Temperature Range)

●   - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads

●   - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

●• Wide Operating Temperature Range . . . -55oC to 125oC

●• Balanced Propagation Delay and Transition Times

●• Significant Power Reduction Compared to LSTTL Logic ICs

●• HC Types

●   - 2V to 6V Operation

●   - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

●• HCT Types

●   - 4.5V to 5.5V Operation

●   - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

●   - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH