●Description
●The CD74HC7046A and CD74HCT7046A high-speed silicon-gate CMOS devices, specified in compliance with JEDEC Standard No. 7A, are phase-locked-loop (PLL) circuits that contain a linear voltage-controlled oscillator (VCO), two-phase comparators (PC1, PC2), and a lock detector. A signal input and a comparator input are common to each comparator. The lock detector gives a HIGH level at pin 1 (LD) when the PLL is locked. The lock detector capacitor must be connected between pin 15 (CLD) and pin 8 (Gnd). For a frequency range of 100kHz to 10MHz, the lock detector capacitor should be 1000pF to 10pF, respectively.
●Features
●• Center Frequency of 18MHz (Typ) at VCC = 5V, Minimum Center Frequency of 12MHz at VCC = 4.5V
●• Choice of Two Phase Comparators
● - Exclusive-OR
● - Edge-Triggered JK Flip-Flop
●• Excellent VCO Frequency Linearity
●• VCO-Inhibit Control for ON/OFF Keying and for Low Standby Power Consumption
●• Minimal Frequency Drift
●• Zero Voltage Offset Due to Op-Amp Buffer
●• Operating Power-Supply Voltage Range
● - VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V
● - Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V
●• Fanout (Over Temperature Range)
● - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
● - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
●• Wide Operating Temperature Range . . . -55oC to 125oC
●• Balanced Propagation Delay and Transition Times
●• Significant Power Reduction Compared to LSTTL Logic ICs
●• HC Types
● - 2V to 6V Operation
● - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
●• HCT Types
● - 4.5V to 5.5V Operation
● - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
● - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
●Applications
●• FM Modulation and Demodulation
●• Frequency Synthesis and Multiplication
●• Frequency Discrimination
●• Tone Decoding
●• Data Synchronization and Conditioning
●• Voltage-to-Frequency Conversion
●• Motor-Speed Control
●• Related Literature
● - AN8823, CMOS Phase-Locked-Loop Application Using the CD74HC/HCT7046A and CD74HC/HCT7046A
Part 3D Model
