CDCEL925PW Datasheet PDF - TI

●The CDCEL925PW is a 2-PLL programmable VCXO Clock Synthesizer with 1.8V LVCMOS outputs. It generates up to five output clocks from a single input frequency. Each output can be programmed in-system for any clock frequency up to 230MHz, using up to two independent configurable PLLs. The input accepts an external crystal or LVCMOS clock signal. In case of a crystal input, an on-chip load capacitor is adequate for most applications. The value of the load capacitor is programmable from 0 to 20pF. Additionally, an on-chip VCXO is selectable which allows synchronization of the output frequency to an external control signal, that is, PWM signal. The deep M/N divider ratio allows the generation of zero-ppm audio/video, networking (WLAN, Bluetooth, Ethernet, GPS) or interface (USB, IEEE1394, memory stick) clocks from a 27MHz reference input frequency, for example. The PLLs support SSC (spread-spectrum clocking).

● Member of programmable clock generator

● Flexible clock driver

● Programmable SSC modulation

● Enables 0-PPM clock generation

● Generates common clock frequencies used with Texas Instruments DaVinci, OMAP and DSPs

● Serial programmable volatile register

● Non-volatile EEPROM to store customer settings

● PLL loop filter components integrated

● Green product and no Sb/Br