CPC5602C Datasheet PDF - Clare

●The CPC5602C is a N-channel depletion-mode FET utilizes IXYS Integrated Circuits Division"s proprietary third generation vertical DMOS process. The third generation process realizes world class, high voltage MOSFET performance in an economical silicon gate process. The vertical DMOS process yields a highly reliable device. One of the primary applications is as a linear regulator/hook switch for the LITELINK™ family of data access arrangements (DAA) devices CPC5620A, CPC5621A and CPC5622A. It has a typical ON-resistance of 8R, a drain-to-source voltage of 350V. As with all MOS devices, the FET structure prevents thermal runaway and thermal-induced secondary breakdown.

● Depletion-mode device offers low RDS (ON) at cold temperatures

● High input impedance

● Low input and output leakage

● PC card (PCMCIA) compatible