●EZ-USB TX2™ Features
●The Cypress EZ-USB TX2™ is a Universal Serial Bus (USB) specification revision 2.0 transceiver, serial/deserializer, to a parallel interface of either 16 bits at 30 MHz or eight bits at 60 MHz. The TX2 provides a high-speed physical layer interface that operates at the maximum allowable USB 2.0 bandwidth. This allows the system designer to keep the complex high speed analog USB components external to the digital ASIC which decreases development time and associated risk. A standard interface is provided that is USB 2.0-certified and is compliant with Transceiver Macrocell Interface (UTMI) specification version 1.05 dated 3/29/01. Two packages are defined for the family: 56-pin SSOP and 56-pin QFN.
●The function block diagram is shown in Figure 1-1. The features of the EX-USB TX2 are:
●• UTMI-compliant/USB-2.0-certified for device operation
●• Operates in both USB 2.0 high speed (HS), 480 Mbits/second, and full speed (FS), 12 Mbits/second
●• Serial-to-parallel and parallel-to-serial conversions
●• 8-bit unidirectional, 8-bit bidirectional, or 16-bit bidirectional external data interface
●• Synchronous field and EOP detection on receive packets
●• Synchronous field and EOP generation on transmit packets
●• Data and clock recovery from the USB serial stream
●• Bit stuffing/unstuffing; bit stuff error detection
●• Staging register to manage data rate variation due to bit stuffing/unstuffing
●• 16-bit 30-MHz, and 8-bit 60-MHz parallel interface
●• Ability to switch between FS and HS terminations and signaling
●• Supports detection of USB reset, suspend, and resume
●• Supports HS identification and detection as defined by the USB 2.0 Specification
●• Supports transmission of resume signaling
●• 3.3 V operation
●• Two package options—56-pin QFN, and 56-pin SSOP
●• All required terminations, including 1.5K-ohm pull up on DPLUS, are internal to the chip
●• Supports USB 2.0 test modes
