CY7C1021DV33-10ZSXI Datasheet PDF - Cypress Semiconductor

●The CY7C1021DV33-10ZSXI is a 1MB high-performance CMOS Static Random Access Memory (SRAM) organized as 65536 words by 16-bit. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking chip enable and write enable inputs LOW. If byte low enable is LOW, then data from I/O pins, is written into the location specified on the address pins. If byte high enable is LOW, then data from I/O pins is written into the location specified on the address pins. Reading from the device is accomplished by taking chip enable and output enable LOW while forcing the write enable HIGH. If byte low enable is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. The input/output pins are placed in a high-impedance state when the device is deselected, the outputs are disabled, the BHE and BLE are disabled or during a write operation.

● Pin and function-compatible with CY7C1021CV33

● High speed - 10ns

● Low active power

● Low CMOS standby power

● 2V Data retention

● Automatic power-down when deselected

● CMOS for optimum speed/power

● Independent control of upper and lower bits