CY7C1041DV33-10ZSXI Datasheet PDF - Cypress Semiconductor

●The CY7C1041DV33-10ZSXI is a 4MB high performance CMOS Static Random Access Memory (SRAM) organized as 256K words by 16-bit. To write to the device, take chip enable and write enable inputs LOW. If byte low enable is LOW, then data from I/O pins is written into the location specified on the address pins. If byte high enable is LOW, then data from I/O pins is written into the location specified on the address pins. To read from the device, take chip enable and output enable LOW while forcing the write enable HIGH. If BLE is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If BHE is LOW, then data from memory appears on I/O8 to I/O15. The input and output pins are placed in a high impedance state when the device is deselected, outputs are disabled, BHE and BLE are disabled or during a write operation.

● Pin and function compatible with CY7C1041CV33

● High speed - 10ns

● Low active power

● Low CMOS standby power

● 2V Data retention

● Automatic power-down when deselected

● TTL-compatible inputs and outputs

● Easy memory expansion with CE and OE