FDC6301N Datasheet PDF - ON Semiconductor

●The FDC6301N is a dual N-channel logic level enhancement-mode FET with high cell density and DMOS technology. It is very high density process is especially tailored to minimize ON-state resistance. It has been designed especially for low voltage applications as a replacement for digital transistors. Since bias resistors are not required, this N-channel FET"s can replace several digital transistors, with a variety of bias resistors.

● Very low level gate drive requirements allowing direct operation in 3V circuits

● Gate-source Zener for ESD ruggedness

● -0.5 to 8V Gate to source voltage

● 0.22A Continuous drain/output current

● 0.5A Pulsed drain/output current