HC595M Datasheet PDF - TI

●description/ordering information

●The CD74HC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and storage registers. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial output for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.

●8-Bit Serial-In, Parallel-Out Shift

●Wide Operating Voltage Range of 2 V to 6 V

●High-Current 3-State Outputs Can Drive Up To 15 LSTTL Loads

●Low Power Consumption, 80-µA Max ICC

●Typical tpd = 14 ns

●±6-mA Output Drive at 5 V

●Low Input Current of 1 µA Max

●Shift Register Has Direct Clear