KSZ8081RNACA-TR Datasheet PDF - Microchip

●The KSZ8081RNACA TR is a single-supply 10Base-T/100Base-TX Ethernet Physical-layer Transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. This is a highly-integrated PHY solution. It reduces board cost and simplifies board layout by using on chip termination resistors for the differential pairs and by integrating a low-noise regulator to supply the 1.2V core and by offering 1.8/2.5/3.3V digital I/O interface support. It offers the reduced media independent interface (RMII) for direct connection to RMII-compliant MACs in Ethernet processors and switches. As the power-up default, this uses a 25MHz crystal to generate all required clocks, including the 50MHz RMII reference clock output for the MAC. This version takes in the 50MHz RMII reference clock as the power-up default.

● RMII back-to-back mode support for a 100Mbps copper repeater

● MDC/MDIO management interface for PHY register configuration

● Programmable interrupt output

● LED outputs for link and activity status indication

● On-chip termination resistors for differential pairs

● Baseline wander correction

● Auto-negotiation to automatically select highest linkup speed (10/100Mbps)/duplex (half/full)

● Power-down and power-saving modes

● LinkMD TDR-based cable diagnostics to identify faulty copper cabling

● Parametric NAND tree support for fault detection between chip I/Os and board