KSZ8893MBL Datasheet PDF - Micrel

●The KSZ8893MBL is a highly integrated layer 2 Managed Switch designed for low port count 10/100Mbps switch systems. It offers an extensive feature set that includes rate limiting, tag/port-based VLAN, QoS priority, management, management information base (MIB) counters, RMII/MII/SNI and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications. It contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control (MAC) units, a high-speed non-blocking switch fabric, a dedicated address lookup engine and an on-chip frame buffer memory. Both PHY units support 10Base-T and 100Base-TX. In addition, one PHY unit supports 100Base-FX.

● Full duplex IEEE 802.3x flow control (PAUSE) with force mode option

● Half-duplex back pressure flow control

● 100BASE-FX support on port 1

● MII interface supports both MAC mode and PHY mode

● RMII interface support with external 50MHz system clock

● 7-wire serial network interface (SNI) support for legacy MAC

● Comprehensive LED Indicator support for link, activity, full/half duplex and 10/100 speed

● Serial management interface (SMI) to all internal registers

● Per port, 802.1p and DiffServ-based

● Re-mapping of 802.1p priority field per port basis

● Four priority levels

● Programmable rate limiting at the ingress and egress on a per port basis

● Broadcast storm protection with % control (global and per port basis)

● IEEE 802.1d spanning tree protocol support

● Special tagging mode to inform the processor which ingress port receives the packet