LPC812M101JD20FP Datasheet PDF - NXP

●The LPC812M101JD20FP is an ARM Cortex-M0+ based, 32-bit Microcontroller operating at CPU frequencies of up to 30MHz. The peripheral complement of the microcontroller includes 16kb of flash memory, 4kb of data memory, CRC engine, one I²C-bus interface, two USARTs, one SPI interface, multi-rate timer, self wakeup timer, state-configurable timer, one comparator, function-configurable I/O ports through a switch matrix, an input pattern match engine and 18 general purpose I/O pins.

● ARM Cortex-M0+ Processor, Built-in Nested Vectored Interrupt Controller (NVIC)

● System Tick Timer

● Serial Wire Debug (SWD) and JTAG boundary Scan Modes Supported

● Micro Trace Buffer (MTB) Supported

● 16kb On-chip Flash Programming Memory, 4kb SRAM

● Boot Loader

● USART Drivers

● I²C Drivers

● Power Profiles

● Flash In-application Programming (IAP) and In-system Programming (ISP)

● High-speed GPIO interface connected to ARM Cortex-M0+ IO Bus with 18 general purpose I/O (GPIO) pins

● GPIO Interrupt Generation Capability with Boolean Pattern-matching Feature on Eight GPIO Inputs

● Switch Matrix for Flexible Configuration of Each I/O Pin Function

● State Configurable Timer (SCT) with IO functions assigned to pins through the switch matrix

● Multiple-channel multi-rate timer for repetitive interrupt generation up to four programmable

● Self Wake-up Timer (WKT) Clocked from Either IRC or a Low-power, Low-frequency Internal Oscillator

● CRC Engine

● Windowed Watchdog Timer

● Analogue, Comparator with external voltage ref with pin assigned or enabled through switch matrix

● Two USART Interfaces with Pin Functions Assigned Through Switch Matrix

●If level three Code Read Protection (CRP3) is selected, no future factory testing can be performed on the device.