●8-bit HCS08 CPU Core
● 8-bit HCS08 CPU Core
● 50 ns minimum instruction cycle time down to 2.7V @ 20 MHz bus
● C-optimized architecture with multiply and divide instructions
● Optional power modes
● Support for up to 32 interrupt/reset sources allows for greater software flexibility and optimization
● Optional auto wake-up from Stop 2 or Stop 3 modes with internal timer typically requires only 300 nA additional current On-Chip Debug Interface
● Single-wire background debug mode
● On-chip trace buffer with nine flexible trigger modes and multiple hardware breakpoints
● Nonintrusive emulation Integrated Third-Generation Flash Memory
● In-application reprogrammable
● Self-timed, fast programming
● Can program 8 bits in 20 µs
● Fast Flash page erase
● 20 ms (512 bytes)
● 10K write/erase cycles minimum, 100K typical
● 15-year minimum data retention, 100 years typical
● Internal program/erase voltage generation
● Fine Flash granularity—512B Flash erase/1B Flash program
● Flexible block protection and enhanced security
● Single power supply program/erase
● Read/program/erase over full operation voltage and temperature Internal Clock Generator
● Programmable frequency-locked loop (FLL) generates 8 MHz to 40 MHz (for bus rates up to 20 MHz)
● Post-FLL divider gives one of eight bus rate dividers
● Trimmable with temperature and voltage compensation
● Provides multiple options for clock sources and in-application clock switching
● 32 KHz to 16 MHz reference external crystal/resonator
● Internal clock generator
● External clock 10-bit Analog-to-Digital Converter (ADC)
● 16-channel ADC
● 2.5 µs, 10-bit single conversion time Timer with Eight Programmable Channels
● 2-channel and 6-channel, 16-bit timer systems
● Each channel programmable for
● Input capture, output compare or buffered pulse-width modulator (PWM)
● PWM can be edge- or center-aligned
● 16-bit free-running or up/down (CPWM) count operation Extensive Serial Communications
● Dual asynchronous SCIs
● Flexible 13-bit module-based baud rate generators
● Double-buffered receive and transmit
● LIN compatible
● Synchronous SPI
● Up to 5 Mbps
● Inter-IC (I2C) bus
● Multimaster operation
● 256 clock options System Protection
● Selectable low-voltage detect/reset
● Enhanced low-voltage warning
● COP watchdog timer Up to 56 Input/Output (I/O) Lines
● Programmable pull-ups
● High-current drivers
● Eight keyboard interrupts
● Controlled rise/fall times minimize noise Product Longevity Program
