MK20DX128VLF5 Datasheet PDF - NXP

●Overview

● Includes a rich suite of analog, communication, timing and control peripherals to accommodate a wide range of requirements

● Maximizes board space and enhances performance with minimum-length interconnections

● Provides performance efficiency with industry-leading low power

● Delivers significant BOM savings through smart on-chip integration

● Shares the comprehensive enablement and scalability of the Kinetis® portfolio

●MoreLess

●## Features

●### Ultra-Low-Power

● 11 low-power modes with power and clock gating for optimal peripheral activity and recovery times. Stop currents of <190 nA (VLLS0), run currents of <270 uA/MHz, 4 µs wake-up from Stop mode

● Full memory and analog operation down to 1.71 volts for extended battery life

● Low-leakage wake-up unit with up to eight internal modules and 16 pins as wake-up sources in low-leakage stop (LLS)/very low-leakage stop (VLLS) modes

● Low-power timer for continual system operation in reduced power state

●### Flash, SRAM and FlexMemory

● 32 KB-128 KB flash. Fast access, high reliability with 4-level security protection

● Up to 16 KB of SRAM

● FlexMemory: Up to 2 KB of user-segmentable byte write/erase EEPROM for data tables/system data. EEPROM with over 10M cycles and flash with 70 µsec write time (brownouts without data loss or corruption). No user or system intervention to complete programming and erase functions and full operation down to 1.71 volts. In addition, FlexNVM from 32 KB for extra program code, data or EEPROM backup.

●### Mixed-Signal Capability

● High-speed 16-bit ADC with configurable resolution. Single or differential output mode operation for improved noise rejection. 500 ns conversion time achievable with programmable delay block triggering

● Up to two high-speed comparators providing fast and accurate motor over-current protection by driving PWMs to a safe state

● Optional analog voltage reference provides an accurate reference to analog blocks and replaces external voltage references to reduce system cost

●### Performance

● 50 MHz ARM Cortex-M4 core with DSP instruction set, single cycle MAC and single instruction multiple data (SIMD) extensions.

● Up to 4-channel DMA for peripheral and memory servicing with reduced CPU loading and faster system throughput

● Cross bar switch enables concurrent multi-master bus accesses, increasing bus bandwidth

● Independent flash banks allow concurrent code execution and firmware updating with no performance degradation or complex coding routines

●### Timing and Control

● Up to two FlexTimers with a total of 10 channels. Hardware dead-time insertion and quadrature decoding for motor control

● Carrier modulator timer for infrared waveform generation in remote control applications

● Four-channel 32-bit periodic interrupt timer provides time base for RTOS task scheduler or trigger source for ADC conversion and programmable delay block

●### Human-Machine Interface

● Hardware touch-sensing interface with up to 16 inputs. Operates in low power modes (minimum current adder when enabled). Hardware implementation avoids software polling method. High sensitivity level allows use of overlay surfaces upto 5 mm thick.

●### Connectivity and Communications

● Full-speed USB Device/Host/On-The-Go with device charge detect capability

● Optimized charging current/time for portable USB devices, enabling longer battery life

● USB low-voltage regulator supplies up to 120 mA off chip at 3.3 volts to power external components from 5-volt input

● Up to three UARTs. One UART supports RS232 with flow control, RS485, ISO7816 and IrDA. All other two UARTS support RS232 with flow control and RS485

● One inter-IC Sound (I2S) serial interface for audio system interfacing

● One DSPI and one I2C

●### Reliability, Safety and Security

● Memory protection unit provides memory protection for all masters on the cross bar switch, increasing software reliability

● Cyclic redundancy check engine validates memory contents and communication data, increasing system reliability

● Independent-clocked COP guards against clock skew or code runaway for fail-safe applications such as the IEC 60730 safety standard for household appliances

● External watchdog monitor drives output pin to safe state external components if watchdog event occurs

● This product is included in NXP"s product longevity program, with assured supply for a minimum of 10 years after launch