NB4L52MNG Datasheet PDF - ON Semiconductor

●The NB4L52MNG is a differential Data and Clock D-type Flip-flop with a differential asynchronous reset. The differential inputs incorporate internal 50 termination resistors and will accept PECL, LVPECL, LVCMOS, LVTTL, CML or LVDS logic levels. When Clock transitions from low to high, Data will be transferred to the differential LVPECL outputs. The differential Clock inputs allow the NB4L52 to also be used as a negative edge triggered device.

● 145ps Typical rise and fall times

● 50R Internal input termination resistors

● Functionally compatible with existing 2.5 V/3.3 V/5.0V LVEL, LVEP, EP and SG devices