PCA9515ADR Datasheet PDF - TI

●The PCA9515ADR is a dual-channel bidirectional I²C Buffer is operational at 2.3 to 3.6-V VCC. It is a BiCMOS integrated circuit intended for I²C bus and SMBus systems applications. The device contains two identical bidirectional open-drain buffer circuits that enable I²C and similar bus systems to be extended without degradation of system performance. It buffers both the serial data (SDA) and serial clock (SCL) signals on the I²C bus, while retaining all the operating modes and features of the I²C system. This enables two buses of 400pF bus capacitance to be connected in an I²C application. The I²C bus capacitance limit of 400pF restricts the number of devices and bus length. Using this buffer enables the system designer to isolate two halves of a bus, accommodating more I²C devices or longer trace lengths. It has an active-high enable (EN) input with an internal pull-up, which allows the user to select when the repeater is active.

● Active-high repeater-enable input

● Lock-up free operation

● Powered-OFF high-impedance I²C-bus pins

● Accommodates standard-mode and fast-mode I²C devices and multiple masters