PCA9617ADPJ Datasheet PDF - NXP

●The PCA9617ADPJ is a level translating Fm+ CMOS I²C-bus Repeater provides level shifting between low voltage and higher voltage fast-mode Plus (Fm+) I²C-bus or SMBus applications. While retaining all the operating modes and features of the I²C-bus system during the level shifts, it also permits extension of the I²C-bus by providing bi-directional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 540pF at 1MHz or up to 4000pF at lower speeds. Using the PCA9617A enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are overvoltage tolerant and are high-impedance when the PCA9617A is unpowered.

● Footprint and functional replacement

● Active high repeater enable input referenced to VCC(B)

● Open-drain input/outputs

● Latching free operation

● Supports arbitration and clock stretching across the repeater

● Powered-off high-impedance I²C pins

● ESD protection exceeds 5500V HBM per JESD22-A114 and 1000V CDM per JESD22-C101

● Latch-up testing is done to JEDEC standard JESD78 which exceeds 100mA

●ESD sensitive device, take proper precaution while handling the device.