SN74ABT125DR Datasheet PDF - TI

●description/ordering information

●The ’ABT125 quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.

●These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

●Typical VOLP(Output Ground Bounce)

●   <1 V at VCC= 5 V, TA= 25°C

●High-Drive Outputs (–32-mA IOH, 64-mA IOL)

●Ioff and Power-Up 3-State Support Hot Insertion

●Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17

●ESD Protection Exceeds JESD 22

●  – 2000-V Human-Body Model (A114-A)

●  – 200-V Machine Model (A115-A)