SN74AHCT125PWR Datasheet PDF - TI

●The SN74AHCT125PWR is a quadruple Bus Buffer Gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high. When OE\ is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.

● Inputs are TTL-voltage compatible

● Latch-up performance exceeds 250mA per JESD 17

● Green product and no Sb/Br