SN74AUP2G08DCUR Datasheet PDF - TI

●The SN74AUP2G08DCUR is a low-power dual 2-input positive-AND Gate and performs the Boolean function Y = A • B or Y = (A\ + B\\)\ in positive logic. The AUP family is premier solution to the industry"s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 to 3.6 V, resulting in increased battery life. This product also maintains excellent signal integrity. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

● 0.9µA Low static-power consumption (ICC)

● 4.3pF Low dynamic-power consumption (Cpd)

● 1.5pF Low input capacitance (Ci)

● <10% of VCC Low Noise - overshoot and undershoot

● Ioff supports partial-power-down mode operation

● Schmitt-trigger action allows slow input transition and better switching noise immunity at the Input

● Optimized for 3.3V operation and 3.6V I/O tolerant

● 5.9ns Propagation delay (tPD)

● Suitable for point-to-point applications

● Latch-up performance exceeds 100mA per JESD 78, Class II

● ESD Performance Tested Per JESD 22

● Green product and no Sb/Br