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SN74F112N
Part 3D Model
$ 0.831
SN74F112N Datasheet PDF (13 Pages)
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SN74F112N Specifications

TYPE
DESCRIPTION
Mounting Style
Through Hole
Frequency
100 MHz
Number of Pins
16 Pin
Supply Voltage (DC)
4.50V ~ 5.50V
Case/Package
PDIP-16
Number of Outputs
1 Output
Output Current
20 mA
Number of Circuits
2 Circuit
Clock Speed
130 MHz
Number of Bits
2 Bit
Propagation Delay Max (tpd)
7.50 ns
Voltage Nodes
5.00 V
Output Current Drive
-50.0 µA
Number of Inputs
2 Input
Operating Temperature (Max)
70 ℃
Operating Temperature (Min)
0 ℃
Supply Voltage
4.5V ~ 5.5V
Supply Voltage (Max)
5.5 V
Supply Voltage (Min)
4.5 V

SN74F112N Size & Package

TYPE
DESCRIPTION
Product Lifecycle Status
Active
Packaging
Tube
Operating Temperature
0℃ ~ 70℃ (TA)

SN74F112N Documents

TI
13 Pages / 0.62 MByte
TI
29 Pages / 0.44 MByte

SN74F112 Documents

TI
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
TI
TEXAS INSTRUMENTS SN74F112N Flip-Flop, Complementary, Differential, Negative Edge, 74F112, JK, 4.6ns, 100MHz, 20mA, DIP
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC
TI
TEXAS INSTRUMENTS SN74F112D Flip-Flop, 74F112, JK, 4.6ns, 130MHz, 20mA, SOIC
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin PDIP Tube
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOIC T/R
TI
Flip Flop JK-Type Neg-Edge 2Element 16Pin SOP T/R
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