SN74LS145DR Datasheet PDF - TI

●The SN74LS145DR is a BCD-to-decimal Decoder/Driver consists of eight inverters and ten 4-input NAND gates. The inverters are connected in pairs to make BCD input date available for decoding by the NAND gates. Full decoding of valid BCD input logic ensures that all outputs remain off for all invalid binary input conditions. These decoders feature high-performance, NPN output transistors designed for use as indicator/relay drivers or as open-collector logic-circuit drivers. Each of the high-breakdown output transistors (15V) of the SN74LS145 will sink up to 80mA of current. Each input is one series 74LS standard load, respectively. Inputs and outputs are entirely compatible for use with TTL or DTL logic circuits and the outputs are compatible for interfacing with most MOS integrated circuits. Power dissipation is typically 35mW for the LS145 series.

● Full decoding of input logic

● TTL Input and output

● All outputs are off for invalid BCD input conditions