SN74LV132APWR Datasheet PDF - TI

●The SN74LV132APWR is a quadruple positive-NAND Gate with Schmitt-trigger inputs. The device performs the Boolean function Y = (A • B)\ or Y = A\ + B\ in positive logic. Each circuit functions as a NAND gate, but because of the Schmitt-trigger, it has different input threshold levels for positive- and negative-going signals. The circuits are temperature compensated and can be triggered from the slowest of input ramps and still give clean jitter-free output signals.

● <0.8V at VCC = 3.3V Typical VOLP (Output ground bounce)

● >2.3V at VCC = 3.3V Typical VOHV (output VOH undershoot)

● Ioff supports live insertion, partial power down mode and back drive protection

● ESD protection exceeds JESD 22

● Latch-up performance exceeds 250mA per JESD 17