SN74LV165AMPWREP Datasheet PDF - TI

●DESCRIPTION

●The SN74LV165A-EP is a parallel-load, 8-bit shift register designed for 2-V to 5.5-V VCC operation.

●When the device is clocked, data is shifted toward the serial output QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the shift/load (SH/LD) input. The SN74LV165A-EP features a clock-inhibit function and a complemented serial output, QH.

●FEATURES

●• Controlled Baseline

●– One Assembly/Test Site, One Fabrication Site

●• Extended Temperature Performance of –55°C to 125°C

●• Enhanced Diminishing Manufacturing Sources (DMS) Support

●• Enhanced Product-Change Notification

●• Qualification Pedigree(1)

●• 2-V to 5.5-V VCC Operation

●• Max tpd of 10.5 ns at 5 V

●• Supports Mixed-Mode Voltage Operation on All Ports

●• Ioff Supports Partial-Power-Down Mode Operation

●• Latch-Up Performance Exceeds 250 mA Per JESD 17

●• ESD Protection Exceeds JESD 22

●– 2000-V Human-Body Model (A114-A)

●– 200-V Machine Model (A115-A)

●– 1000-V Charged-Device Model (C101)