SN74LVC16373ADGGR Datasheet PDF - TI

●The SN74LVC16373ADGGR is a 16-bit transparent D Latch with 3-state outputs. It is designed for 1.65 to 3.6V VCC operation. The device is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The device can be used as two 8-bit latches or one 16-bit latch. When the LE input high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE\ does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

● Member of the Texas Instruments Widebus™ family

● Ioff Supports live-insertion, partial-power-down mode and back-drive protection

● Supports mixed-mode signal operation

● Latch-up performance exceeds 100mA per JESD, 78 class II

● Green product and no Sb/Br