SN74LVC16374ADGGR Datasheet PDF - TI

●The SN74LVC16374ADGGR is a 16-bit edge-triggered D-type Flip-flop with 3-state outputs. It is designed for 1.65 to 3.6V VCC operation. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. On the positive transition of the clock input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs. A buffered OE input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pull-up components. OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

● Ioff Supports live insertion, partial-power-down mode and back-drive protection

● Supports mixed-mode signal operation on all ports

● Latch-up performance exceeds 250mA per JESD 17

● Green product and no Sb/Br