SN74LVC1G79DCKR Datasheet PDF - TI

●The SN74LVC1G79DCKR is a single positive-edge-triggered D-type Flip-flop is designed for 1.65 to 5.5V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

● Supports down translation to VCC

● Ioff Supports live insertion, partial-power-down mode and back-drive protection

● Latch-up performance exceeds 100mA per JESD 78, class II

● ±24mA Output drive at 3.3V

● Green product and no Sb/Br