SN74S00N3 Datasheet PDF - TI

●description/ordering information

●These devices contain four independent 2-input NAND gates. The devices perform the Boolean function

●Y = A •Bor Y = A+ Bin positive logic.

●Package Options Include Plastic Small-Outline (D, NS, PS), Shrink Small-Outline (DB), and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) DIPs

●Also Available as Dual 2-Input Positive-NAND Gate in Small-Outline (PS) Package