●Description
●The STM32F101x4 and STM32F101x6 Low-density access line family incorporates the high-performance ARM Cortex™-M3 32-bit RISC core operating at a 36 MHz frequency, high-speed embedded memories (Flash memory of 16 to 32 Kbytes and SRAM of 4 to 6 Kbytes), and an extensive range of enhanced peripherals and I/Os connected to two APB buses. All devices offer standard communication interfaces (one I2C, one SPI, and two USARTs), one 12-bit ADC and up to two general-purpose 16-bit timers.
●Features
●■ Core: ARM 32-bit Cortex™-M3CPU
●– 36 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
●– Single-cycle multiplication and hardware division
●■ Memories
●– 16 to 32 Kbytes of Flash memory
●– 4 to 6 Kbytes of SRAM
●■ Clock, reset and supply management
●– 2.0 to 3.6 V application supply and I/Os
●– POR, PDR and programmable voltage detector (PVD)
●– 4-to-16 MHz crystal oscillator
●– Internal 8 MHz factory-trimmed RC
●– Internal 40 kHz RC
●– PLL for CPU clock
●– 32 kHz oscillator for RTC with calibration
●■ Low power
●– Sleep, Stop and Standby modes
●–VBATsupply for RTC and backup registers
●■ Debug mode
●– Serial wire debug (SWD) and JTAG interfaces
●■ DMA
●– 7-channel DMA controller
●– Peripherals supported: timers, ADC, SPIs, I2Cs and USARTs
●■ 1 × 12-bit, 1 µs A/D converter (up to 16 channels)
●– Conversion range: 0 to 3.6 V
●– Temperature sensor
●■ Up to 51 fast I/O ports
●– 26/37/51 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant
●■ Up to 5 timers
●– Up to two16-bit timers, each with up to 4 IC/OC/PWM or pulse counter
●– 2 watchdog timers (Independent and Window)
●– SysTick timer: 24-bit downcounter
●■ Up to 4 communication interfaces
●– 1 x I2C interface (SMBus/PMBus)
●– Up to 2 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
●– 1 × SPI (18 Mbit/s)
●■ CRC calculation unit, 96-bit unique ID
●■ ECOPACK® packages
Part 3D Model
