TLC555IDR Datasheet PDF - TI

●The TLC555IDR is a monolithic Timing Circuit fabricated using the TI LinCMOS™ process. The timer is fully compatible with CMOS, TTL and MOS logic and operates at frequencies up to 2MHz. Because of its high input impedance, this device uses smaller timing capacitors than those used by the NE555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power supply voltage. Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low.

● Very low power consumption

● Capable of operation in astable mode

● CMOS Output capable of swinging rail to rail

● High output-current capability

● Output fully compatible with CMOS, TTL and MOS

● Low supply current reduces spikes during output transitions

● Functionally interchangeable with the NE555, has same pin-out

● ESD protection exceeds 2000 V per MIL-STD-883C, method 3015.2

● Green product and no Sb/Br