TPS2350EVM Datasheet PDF - TI

●The TPS2350 -48 V hot swap/supply selector EVM kit is a PCB-based platform that enables designers to rapidly learn about the TPS2350 operation, and evaluate its performance during hot swap events.

●The assembly (TI part number HPA021-001) features a TPS2350 device as it may be connected in the power interface section of a hot swap-capable plug-in card. The assembly also provides additional controls and components to simplify testing and for quick modifications of the circuit characteristics. Input power to the module is connected at three banana jacks located on the left-hand side of the board. A toggle switch is provided to rapidly apply power to and remove it from the circuit. The hot swap circuit on the EVM board contains the TPS2350 HSPM device, a power MOSFET switch, sense resistor and some configuration capacitors. Two through-hole patterns are provided on the load side for the installation of large-value aluminum electrolytic capacitors. These capacitors simulate the input bulk capacitance that may be found on the target module"s back-end supply plane. The EVM is supplied from the factory with a 100 µF capacitor installed in one of the locations. The second pattern, connected in parallel with the first, can be used to increase or otherwise modify the amount of load capacitance. With the TPS2350, both inrush slew rate limiting and a fault time-out period are externally programmable using capacitors. On the EVM board, several options are provided for slew rate limit setting, for quick comparison of the effect of capacitor value on this function. The capacitors can be quickly switched in and out of the circuit via the DIP switch SW1. Fault timing programming is set up in a similar manner; some amount of capacitance is hard-wired into the circuit, with the option of switching in additional capacitance. N-channel FETs are also provided on-board to exercise or demonstrate the supply selection operation of the TPS2350 when two supplies are connected to the board.

●The board also contains the component patterns and connections to exercise the undervoltage (UVLO) and overvoltage (OVLO) lockout functions. A slide switch is also tied into the UV input pin to provide an alternate means of enabling and disabling the output voltage. The powergood output can be monitored directly at the device pin, or through the on-board opto-coupler. Test points are provided throughout the circuit for easy voltage monitoring via oscilloscope or voltmeter.

●The TPS2350 integrated circuit is a hot swap power manager optimized for use in nominal -48 V systems. It operates over a supply voltage range of -12 V to -80 V, and is rated to withstand spikes to -100 V.

●The TPS2350 in conjunction with an external N-channel FET and sense resistor, can be used to enable live insertion of plug-in cards and modules into powered systems. It provides load current slew rate control and peak magnitude limiting. Undervoltage and overvoltage shutdown thresholds are easily programmed via a three-resistor divider network. A power good (PG) output enables downstream converters. The TPS2350 also provides the basic hot swap functions of electrical isolation of faulty cards, filtered protection against nuisance overcurrent trips, and single-line fault reporting.

●The TPS2350 also provides a unique feature for redundant-supply systems. The supply selection function can be used to reduce power losses of diode-OR systems. A selection comparator monitors the two input supplies, and selects the supply with the larger magnitude. Internal driver circuits provide the gate drive needed to control two external N-channel FETs, providing a low-loss switch closure for the active supply, while disconnecting the lower voltage supply.

●For input capacitor charging and load current faults, the TPS2350 provides an internal fault timer to filter out spurious current glitch events. In the event of a persistent fault which exceeds the programmable timer setting, the TPS2350 turns off the hot swap FET, disconnecting the load. A retry mode periodically tests for continued existence of the fault at a low duty cycle, thus protecting the pass FET from excessive dissipation.