TPS3306-25D Datasheet PDF - TI

●The TPS3306-25D is a dual-processor Supervisory Circuit with active-low open-drain output. The supervisory circuit designed for circuit initialization which requires two supply voltages, primarily in DSP and processor-based systems. The various supervisory circuits are designed to monitor the nominal supply voltage. During power-on, /RESET is asserted when the supply voltage VDD becomes higher than 1.1V. Thereafter, the supervisory circuits monitor the SENSEn inputs and keep /RESET active as long as SENSEn remains below the threshold voltage VIT. An internal timer delays the return of the /RESET output to the inactive state (high) to ensure proper system reset. The delay time, td(typ)=100ms, starts after SENSE1 and SENSE2 inputs have risen above the threshold voltage VIT. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage VIT, the output becomes active (low) again.

● Voltage monitor for power-fail or low-battery warning

● Watchdog timer with 0.8 second time-out

● power-ON reset generator

● Open-drain reset and power-fail output

● Defined /RESET output from VDD >= 1.1V

● 15µA Typical supply current

● Green product and no Sb/Br