TPS51116PWPG4 Datasheet PDF - TI

●The TPS51116PWPG4 is a synchronous Buck Controller provides a complete power supply for DDR/SSTL-2, DDR2/SSTL-18, DDR3/SSTL-15 and LPDDR3 memory systems. It integrates a synchronous buck controller with a 3A sink/source tracking linear regulator and buffered low noise reference. The TPS51116 synchronous controller runs fixed output 400kHz, pseudo-constant frequency PWM with an adaptive on-time control that can be configured in D-CAP Mode for ease of use and fastest transient response or in current mode to support ceramic output capacitors. The 3A sink/source LDO maintains fast transient response only requiring 20µF (2 x 10µF) of ceramic output capacitance. In addition, the LDO supply input is available externally to significantly reduce the total power losses. The device supports all of the sleep state controls placing VTT at high-Z in S3 (suspend to RAM) and discharging VDDQ, VTT and VTTREF (soft-OFF) in S4/S5 (suspend to disk).

● D-CAP™ mode with 100ns load step response

● Current mode option supports ceramic output capacitors

● Current sensing from RDS(on) or resistor

● 2.5V (DDR), 1.8V (DDR2), adjustable to 1.5V (DDR3) or 1.2V (LPDDR3) or output range 0.75V to 3V

● Equipped with powergood, overvoltage protection and undervoltage protection

● LDO input available to optimize power losses

● Buffered low noise 10mA VREF output

● Accuracy ±20mV for both VREF and VTT

● Thermal shutdown

● Green product and no Sb/Br