TPS51200QDRCRQ1 Datasheet PDF - TI

●The TPS51200QDRCRQ1 is a sink and source double-data-rate (DDR) Termination Regulator specifically designed for low input voltage and low-noise systems where space is a key consideration. The device maintains a fast transient response and only requires a minimum output capacitance of 20µF. The device supports a remote sensing function and all power requirements for DDR, DDR2, DDR3 and Low Power DDR3 and DDR4 VTT bus termination. In addition, the device provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

● Qualified for automotive applications

● AEC-Q100 Test guidance

● Supports 2.5V rail and 3.3V rail input voltage

● 1.1 to 3.5V VLDOIN voltage range

● Sink and source termination regulator includes droop compensation

● REFIN Input allows for flexible input tracking either directly or through resistor divider

● Remote sensing (VOSNS)

● ±10mA Buffered reference (REFOUT)

● Built-in soft start, UVLO and OCL

● Thermal shutdown

● Meets DDR, DDR2 JEDEC specifications

● Green product and no Sb/Br