X5043PZ Datasheet PDF - Intersil

●The X5043PZ is a CPU Supervisor combines four popular functions, power-on reset control, watchdog timer, supply voltage supervision and block lock protect serial EEPROM memory. This combination reduces board space requirements and increases reliability. Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor executes code. The watchdog timer provides an independent protection mechanism for microcontrollers. When the microcontroller fails to restart a timer within a selectable time out interval, the device activates the RESET/RESET signal. The user selects the interval from three preset values. Once selected, the interval does not change, even after cycling the power. The device is low VCC detection circuitry protects the user"s system from low voltage conditions, resetting the system when VCC falls below the minimum VCC trip point.

● Low VCC detection and reset assertion - Reset signal valid to VCC=1V

● Long battery life with low power consumption

● 4kB of EEPROM-1M write cycle endurance

● Save critical data with Block Lock™ memory - Protect 1/4, 1/2, all or none of EEPROM array

● Built-in inadvertent write protection - Write enable latch and write protect pin

● SPI interface - 3.3MHz clock rate

● Minimize programming time - 16-byte page write mode and 5ms write cycle time (typical)