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EPM240T100 Datasheet PDF

Part Series:
EPM240T100 Series
Category:
CPLDs
Description:
CPLD MAX II Family 192 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
Updated Time: 2023/01/13 02:39:07 (UTC + 8)

EPM240T100 Datasheet PDF CPLDs

298 Pages
Altera
CPLD MAX II Family 192 Macro Cells 304MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
298 Pages
Altera
CPLD MAX II Family 192 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
298 Pages
Altera
CPLD MAX II Family 192 Macro Cells 247.5MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
298 Pages
Altera
CPLD MAX II Family 192 Macro Cells 304MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
298 Pages
Altera
CPLD MAX II Family 192 Macro Cells 201.1MHz 0.18um Technology 2.5V/3.3V 100Pin TQFP
298 Pages
Intel
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, LEAD FREE, TQFP-100
88 Pages
Intel
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, LEAD FREE, TQFP-100
88 Pages
Intel
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, TQFP-100
88 Pages
Intel
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, TQFP-100
88 Pages
Intel
Flash PLD, 4.7ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, LEAD FREE, TQFP-100
88 Pages
Intel
Flash PLD, 6.1ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, LEAD FREE, TQFP-100
88 Pages
Intel
Flash PLD, 7.5ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, LEAD FREE, TQFP-100
88 Pages
Intel
Flash PLD, 4.7ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, TQFP-100
88 Pages
Intel
Flash PLD, 6.1ns, 192-Cell, CMOS, PQFP100, 16 X 16MM, 0.5MM PITCH, TQFP-100

EPM240T100C5N - Altera Specifications

TYPE
DESCRIPTION
Mounting Style
Surface Mount
Frequency
201.1 MHz
Number of Pins
100 Pin
Supply Voltage (DC)
3.30 V
Case/Package
TQFP-100
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EPM240T100C5N - Altera Function Overview

The EPM240T100C5N is a MAX II instant-on non volatile CPLD with speed grade 5 in 100 pin TQFP package. It is based on 0.18µm, 6 layer metal flash process with non volatile storage of 8Kbits. MAX II device offers high I/O counts, fast performance and reliability. It has MultiVolt core, user flash memory (UFM) block and enhanced in-system programmability (ISP). MAX II device is designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR), sequencing control and device configuration control.
Worst case pin to pin delay (tpd) of 4.7ns
MultiVolt core external supply voltage of 3.3V, 2.5V
240 logic elements (LE)
192 macrocells
80 maximum user I/O pins
Operating junction temperature range from 0°C to 85°C
Standby current as low as 25µA
Maximum global clock frequency of 201.1MHz for 16bit counter
Supports hot socketing
ISP circuitry compliant with IEEE std 1532
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